1. Field of Invention
Exemplary embodiments of the present invention relate to a method of manufacturing a piezoelectric device and a ferroelectric device, a droplet ejection head, and electronic equipment.
2. Description of Related Art
A piezoelectric element, which is a type of a piezoelectric device, has a structure in which a piezoelectric layer composed of a poly-crystal, an upper electrode, and a lower electrode that are disposed in a manner of sandwiching the piezoelectric layer, are included; The piezoelectric element utilizes stress caused in the piezoelectric layer when voltage is applied between the upper and lower electrodes. In addition, a ferroelectric memory (FeRAM), which is a type of ferroelectric device, has a structure in which a ferroelectric layer, an upper electrode, and an lower electrode that are disposed in a manner of sandwiching the ferroelectric layer, are included. A ferroelectric memory is a non-volatile memory that utilizes the characteristic in which charges are accumulated in the upper and lower electrodes for a long period due to of the ferroelectricity of the ferroelectric layer. As materials for upper and lower electrodes, noble metals such as Pt (platinum) and Ir (iridium) are used. As a material for a piezoelectric layer and a ferroelectric layer, for example, lead zirconate titanate (Pb(Zr, Ti)O3:PZT) is used.
These piezoelectric and ferroelectric devices are formed by pattering upper and lower electrodes, and piezoelectric or ferroelectric layer into a given shape using a photolithography technique on a substrate, such as Si (silicon). As an example, a piezoelectric layer is patterned through the following processes. First, a piezoelectric layer is formed on the whole surface of a substrate and thereafter, the upper surface of the piezoelectric layer is coated with resist. Next, the resist is patterned into a desired shape so as to form a resist pattern, and then unwanted parts of the piezoelectric layer are removed by etching and so forth while utilizing the resist pattern as a mask. Finally, the resist pattern is removed to thereby obtain a piezoelectric layer having a pattern of a desired shape. As for an upper electrode, a lower electrode, and a ferroelectric layer, patterning is implemented in similar processes.
However, there is a problem that patterning using a photolithography technique as above, contributes to an increase in manufacturing cost and manufacturing time since the efficiency in the use of a material is low and the processes become complicated. In order to address or solve the above discussed and/or other problems, related art includes a selective growth method by which patterns are selectively formed only on a desired region on a substrate. For example, International Publication WO00/075992 pamphlet discloses a method in which a lower electrode, a ferroelectric layer, and an upper electrode are selectively formed by using such a method so as to fabricate a ferroelectric memory.